ハブ君の寝言

日記のような何か

今日のエラー

Error verilog 
ERROR:MapLib:979 - LUT2 symbol
   "memory/LAB_DESIGN_USR/r_APP_WDF_DATA_mux0000<0>1" (output
   signal=memory/LAB_DESIGN_USR/r_APP_WDF_DATA_mux0000<0>) has input signal
   "memory/ShiftRegistar/OutData<0>" which will be trimmed. See Section 5 of the
   Map Report File for details about why the input signal will become undriven.

http://japan.xilinx.com/support/answers/30477.htm